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rev 1.0 august 2017 www.aosmd.com page 1 of 17 AOZ2151TQI-19 28v/4a synchronous ezbuck tm regulator general description the AOZ2151TQI-19 is a high-efficiency, easy-to-use dc/dc synchronous buck regulator that operates up to 28v. the device is capable of supplying 4a of continuous output current with an output voltage adjustable down to 0.8v 1%. the AOZ2151TQI-19 integrates an internal linear regulator to generate 5.3v v cc from input. if input voltage is lower than 5.3v, the linear regulator operates at low drop output mode, which allows the v cc voltage is equal to input voltage minus the drop-output voltage of the internal linear regulator. a proprietary constant on-time pwm control with input feed-forward results in ultra-fast transient response while maintaining relative ly constant switching frequency over the entire input voltage range. the device features multiple protection functions such as v cc under-voltage lockout, c ycle-by-cycle current limit, output over-voltage protecti on, short-circuit protection, and thermal shutdown. the AOZ2151TQI-19 is available in a 3mm3mm qfn- 18l package and is rated over a -40c to +85c ambient temperature range. features ? wide input voltage range C 6.5v to 28v ? 4a continuous output current ? output voltage adjustable down to 0.8v (1.0%) ? low r ds(on) internal nfets C 28m ? high-side C 28m ? low-side ? constant on-time wit h input feed-forward ? ceramic capacitor stable ? adjustable soft start ? power good output ? integrated bootstrap diode ? cycle-by-cycle current limit ? short-circuit protection ? thermal shutdown ? force pwm operation ? thermally enhanced 3mm x 3mm qfn-18l package applications ? compact desktop pcs ? graphics cards ? set-top boxes ? lcd tvs ? cable modems ? point-of-load dc/dc converters ? telecom/networking/datacom equipment AOZ2151TQI-19 output5v, 4a c3 88f r1 r3 100kohm r2 c2 22f c5 0.1f analog ground power ground power good off on vcc pgood en ss c ss c4 4.7f bst lx fb agnd pgnd l1 2.2h in 5v input voltage 6.5v to 28v typical application downloaded from: http:///
AOZ2151TQI-19 rev 1.0 august 2017 www.aosmd.com page 2 of 17 output voltage vs. operating frequency recommended start-up sequence aoz2152tqi-19 output voltage (v) 56 78 9 1 1 10 12 13 4 operating frequency (khz) 1,000 900800 700 600 500 400 300 200 2 vin en 50s downloaded from: http:///
AOZ2151TQI-19 rev 1.0 august 2017 www.aosmd.com page 3 of 17 ordering information aos green products use reduced levels of halogens, and are also rohs compliant. please visit www.aosmd.com/media/aosgreenpolicy.pdf for additional information. pin configurationpin description part number ambient temperature range package environmental AOZ2151TQI-19 -40c to +85c 18-pin 3mm x 3mm qfn green product pin number pin name pin function 1 pgood power good signal output. pgoo d is an open-drain output used to indicate the status of the output voltage. it is internally pulled low when the output voltage is 15% lower than the nominal regulation voltage or 20% hi gher than the nominal regulation voltage. pgood is pulled low during soft-start and shut down. 2f b feedback input. adjust the output voltage wi th a resistive voltage-divider between the regulators output and agnd. 3 agnd analog ground. 4, 5, 6, 7, 8 in supply input. in is the regulato r input. all in pins must be connected together. 9, 13, 14 lx switching node. 10, 11, 12 pgnd power ground. 15 en enable input. the AOZ2151TQI-19 is enabled when en is pulled high. the device shuts down when en is pulled low. 12 3 4 5 67 8 9 10 11 12 13 14 1516 17 pgood fb agnd inin inin in lx pgnd pgnd pgnd lx lx en bst vcc in lx 18 ss 18-pin 3mm x 3mm qfn (top view) downloaded from: http:///
AOZ2151TQI-19 rev 1.0 august 2017 www.aosmd.com page 4 of 17 16 bst bootstrap capacitor connection. the aoz215 1tqi-19 includes an internal bootstrap diode. connect an external capacitor between bst and lx as shown in the typical application diagram. 17 vcc supply input for analog functions. bypass vcc to agnd with a 4.7f~10f ceramic capacitor. place the capacitor close to vcc pin. 18 ss soft-start time setting pin. connect a capacitor between ss and agnd to set the soft-start time. pin number pin name pin function downloaded from: http:///
AOZ2151TQI-19 rev 1.0 august 2017 www.aosmd.com page 5 of 17 absolute maximum ratings exceeding the absolute maximum ratings may damage the device. notes: 1. lx to pgnd transient (t<20ns) ------- -7v to v in +7v. 2. devices are inherently esd s ensitive, handling precautions are required. human body model rating: 1.5k ? in series with 100pf. maximum operating ratings the device is not guaranteed to operate beyond the maximum operating ratings. parameter rating in to agnd -0.3v to 30v lx to agnd (1) -0.3v to 30v bst to agnd -0.3v to 36v ss, pgood, fb, en, vcc to agnd -0.3v to 6v pgnd to agnd -0.3v to +0.3v junction temperature (t j ) +150c storage temperature (t s ) -65c to +150c esd rating (2) 2kv parameter rating supply voltage (v in ) 6.5v to 28v output voltage range 0.8v to 0.85*v in ambient temperature (t a ) -40c to +85c package thermal resistance ? ja ? jc 40c/w 6c/w electrical characteristicst a = 25c, v in =12v, en = 5v, unless otherwise specified. specifications in bold indicate a temperature range of -40c to +85c. symbol parameter conditions min. typ. max units v in in supply voltage 6.5 28 v v uvlo under-voltage lockout threshold of v in v in rising v in falling 3.2 4.03.7 4.4 v i q quiescent supply current of v in i out = 0, v en > 2v, pfm 0.16 ma i off shutdown supply current v en = 0v 15 ? a v fb feedback voltage t a = 25c t a = 0c to 85c 0.7920.788 0.800 0.800 0.808 0.812 v load regulation 0.5 % line regulation 1% i fb fb input bias current 200 na enable v en en input threshold off threshold on threshold 1.4 0.5 v v en_hys en input hysteresis 100 mv modulator t on _ min minimum on time 60 ns t off _ min minimum off time 300 ns soft-start i ss _ out ss source current v ss = 0 c ss = 0.001 ? f to 0.1 ? f 71 11 5 ? a downloaded from: http:///
AOZ2151TQI-19 rev 1.0 august 2017 www.aosmd.com page 6 of 17 power good signal v pg_low pgood low voltage i ol = 1ma 0.5 v pgood leakage current 1 ? a v pgh pgood threshold (low level to high level) fb rising 90 % v pgl pgood threshold (high level to low level) fb rising fb falling 120 85 % pgood threshold hysteresis 5 % under voltage and over voltage protection v pl under voltage threshold fb falling 70 % t pl under voltage delay time 32 ? s v ph over voltage threshold fb rising 120 % power stage output r ds(on) high-side nfet on-resistance v in = 12v 28 m ? high-side nfet leakage v en = 0v, v lx = 0v 10 ? a r ds(on) low-side nfet on-resistance v lx = 12v 28 m ? low-side nfet leakage v en = 0v 10 ? a over-current and thermal protection i lim current limit 6 a thermal shutdown threshold t j rising t j falling 150 100 c electrical characteristicst a = 25c, v in =12v, en = 5v, unless otherwise specified. specifications in bold indicate a temperature range of -40c to +85c. symbol parameter conditions min. typ. max units downloaded from: http:///
rev 1.0 august 2017 www.aosmd.com page 7 of 17 AOZ2151TQI-19 functional block diagram isense ilim error comp ilim comp 0.8v isense (ac) fb decode otp bst pg logic agnd pgnd isense (dc)isense (ac) current information processing vcc in pgood uvlo ldo toff_min s r q timer q fb ss light load threshold isense light loadcomp vcc en reference & bias lx ton timer q en downloaded from: http:///
rev 1.0 august 2017 www.aosmd.com page 8 of 17 AOZ2151TQI-19 typical performance characteristics circuit of typical application. t a = 25c, v in = 19v, v out = 5v, unless otherwise specified. normal operation vlx (20v/div) ilx (5a/div) v o ripple (50mv/div) 10s/div load transient 0a to 4a ilx (5a/div) v o ripple (200mv/div) 500s/div full load start-up ilx (10a/div) v o (5v/div) en (5v/div) vlx (20v/div) 1ms/div short circuit protection vlx (20v/div) ilx (10a/div) v o (2v/div) 10s/div v out = 5v efficiency (%) output current (a) 100 9080 70 60 50 40 30 20 10 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4 efficiency vs. load current vin = 6.5v vin = 12v vin = 19v vin = 24v downloaded from: http:///
AOZ2151TQI-19 rev 1.0 august 2017 www.aosmd.com page 9 of 17 detailed description the AOZ2151TQI-19 is a high-efficiency, easy-to-use, synchronous buck regulator optimized for notebook computers. the regulator is capable of supplying 4a of continuous output current with an output voltage adjustable down to 0.8v. the input voltage of AOZ2151TQI-19 can be as low as 6.5v. the highest input voltage of AOZ2151TQI-19 can be 28v. constant on-time pwm with input feed-forward control scheme results in ul tra-fast transient response while maintaining relatively constant switching frequency over the entire input range. true ac current mode control scheme guarantees the regulator can be stable with ceramics output capacitor. protection features include v cc under-voltage lockout, current limit, output over voltage and under voltage protection, short-circuit protection, and thermal shutdown. the AOZ2151TQI-19 is available in 18-pin 3mmx3mm qfn package. input power architecture the AOZ2151TQI-19 integrates an internal linear regulator to generate 5.3v (5%) v cc from input. if input voltage is lower than 5.3v, the linear regulator operates at low drop-output mode; the v cc voltage is equal to input voltage minus the drop-output voltage of internal linear regulator. soft start the AOZ2151TQI-19 has external soft start feature to limit in-rush current and ensure the output voltage ramps up smoothly to regulation voltage. a soft start process begins when v cc rises to 4.5v and voltage on en pin is high. an internal current source charges the external soft-start capacitor; the fb voltage follows the voltage of soft-start pin (v ss ) when it is lower than 0.8v. when v ss is higher than 0.8v, the fb voltage is regulated by internal precise band-gap voltage (0.8v). when v ss is higher than 3.3v, the pgood signal is high. the soft- start time for pgood can be calculated by the following formula: t ss ( ? s) = 330 x c ss (nf) if c ss is 1nf, the soft-start time will be 330 second; if c ss is 10nf, the soft-start time will be 3.3m second. figure 1. soft start sequence enable the AOZ2151TQI-19 has an embedded discharge path, including a 100k ? resistor and an m1 nmos device. this discharge path is activated when v in (input voltage) is high and v en (enable voltage) is low. the internal circuit of en pin is shown in figure 2. figure 2 . enable internal circuit there are two different enable control methods: 1. connection to en pin by an external resistor divider. 2. direct connection to en pin by an external power source, vs. in the first condition, we must consider the internal pull down resistance by using a divider circuit with an external power source v s and get v en , the v en can be calculated by the following formula:when the v in is high and v en is high, the en internal m1 is turned off, and then the pull down resistance is removed for v en , the v en can be re-calculated by: v out v ss v ss = 3.3v v ss = 0.8v pgood en agnd r 1 r 2 r en_pl 100k v in en1 en1 en detection en signal v s v en m1 ? ) // ( // 2 1 _ 2 pl en pl en en r r r r r v ? ? ? v s downloaded from: http:///
rev 1.0 august 2017 www.aosmd.com page 10 of 17 AOZ2151TQI-19 in the second co ndition, the ao z2151tqi-19 will be turned on when the v en is higher than 1.4v, and will be turned off when the v en is lower than 0.5v. the simplified schematic and timing sequence are shown in figure 3. figure 3 . enable threshold schematic and timing sequence constant-on-time pwm control with input feed-forward the control algorithm of AOZ2151TQI-19 is constant-on- time pwm control with input feed-forward. the simplified control schematic is shown in figure 4 . the high-side switch on-time is determined solely by a one-shot whose pulse width is inversely propor tional to input voltage (in). the one-shot is triggered when the internal 0.8v is higher than the combined information of fb voltage and the ac current information of inductor, which is processed and obtained through the sensed lower-side mosfet current once it turns-on. the added ac current information can help the stability of constant -on time control even with pure ceramic output capaci tors, which have very low esr. the ac current informat ion has no dc offset, which does not cause offset with output load change, which is fundamentally different from other v 2 constant-on time control schemes. figure 4. simplified control schematic true current mode control the constant-on-time contro l scheme is intrinsically unstable if output capacitors esr is not large enough as an effective current-sense resistor. ceramic capacitors usually cannot be used as output capacitor. the AOZ2151TQI-19 senses the low-side mosfet current and processes it into dc current and ac current information using aos proprietary technique. the ac current information is decoded and added on the fb pin on phase. with ac current information, the stability of constant-on-time control is significantly improved even without the help of output capacitors esr; and thus, the pure ceramic capacitor solution can be applicant. the pure ceramic capacitor soluti on can significantly reduce the output ripple (no esr caused overshoot and undershoot) and less board area design. current-limit protection the AOZ2151TQI-19 has the current-limit protection by using r ds(on) of the low-side mosfet to be as current sensing. to detect real current information, a minimum constant off (300ns typical) is implemented after a constant-on time. if the current exceeds the current-limit threshold, the pwm controller is not allowed to initiate a new cycle. the actual peak current is greater than the current-limit threshold by an amount equal to the inductor ripple current. therefore, the exact current-limit characteristic and maximum load capability are a function of the inductor value and input and output voltages. the current limit will keep the low-side mosfet on and will not allow another high-side on-time, until the current in the low-side mosfet reduces below the current limit. after 8 switching cycles, the AOZ2151TQI-19 considers this is a true failed condition and thus turns-off both high- side and low-side mosfets and shuts down. the AOZ2151TQI-19 enters hiccup mode to periodically restart the part. when the current limit protection is removed, the aoz2151tqi -19 exits hiccup mode. figure 5. ocp timing chart 2 1 2 r r r v en ? ? v s hysteresis 0. 3v 1.05v en pin en pin en en 1.4v 0.5v + C programmable one-shot in comp fb voltage/ac current information 0.8v pwm inductor current feedback voltage output voltage vcc voltage soft-start voltage lx voltage -0.7v downloaded from: http:///
AOZ2151TQI-19 rev 1.0 august 2017 www.aosmd.com page 11 of 17 output voltage under-voltage protection if the output voltage is lower than 70% by over-current or short circuit, AOZ2151TQI-19 will wait for 32s (typical) and turns-off both high-side and low-side mosfets shuts down. the AOZ2151TQI-19 enters hiccup mode to periodically restart the part. when the current limit protection is removed, the AOZ2151TQI-19 exits hiccup mode. output voltage over-voltage protection the threshold of ovp is set 20% higher than 800mv. when the vfb voltage exceeds the ovp threshold, high- side mosfet is turned of f and low-side mosfet is turned on until vfb voltage is lower than 800mv. figure 6. ovp timing chart power good output the power good (pgood) out put, which is an open drain output, requires the pull-up resistor. when the output voltage is 15% below than the nominal regulation voltage for, the pgood is pulled low. when the output voltage is 20% higher than the nominal regulation voltage, the pgood is also pull low. when combined with the under-voltage-protection circuit, this current-limit method is effective in almost every circumstance. application information the basic AOZ2151TQI-19 app lication circuit is shown in the typical application section. the component selection is explained below. input capacitor the input capacitor must be connected to the in pins and pgnd pin of the AOZ2151TQI-19 to maintain steady input voltage and filter out the pulsing input current. a small decoupling capacitor, usually 4.7f, should be connected to the v cc pin and agnd pin for stable operation of the AOZ2151TQI-19. the voltage rating of input capacitor must be greater than maximum input voltage plus ripple voltage. the input ripple voltage can be approximated by equation below: since the input current is discontinuous in a buck converter, the current stre ss on the input capacitor is another concern when selecti ng the capacitor. for a buck circuit, the rms value of i nput capacitor current can be calculated by: if let m equal the conversion ratio: the relation between the input capacitor rms current and voltage conversion ratio is calculated and shown in figure 7. it can be seen that when v o is half of v in , c in it is under the worst curren t stress. the worst current stress on c in is 0.5 x i o . figure 7. i cin vs. voltage conversion ratio inductor current ovp threshold feedback voltage output voltage vcc voltage soft-start voltage v in +0.7v lx voltage ? v in i o fc in ? ----------------- 1 v o v in -------- - C ?? ?? ?? v o v in -------- - ? ? = i cin_rms i o v o v in -------- - 1 v o v in -------- - C ?? ?? ?? ? = v o v in -------- - m = 0 0.1 0.2 0.3 0.4 0.5 0 0.5 1 m i cin_rms (m) i o downloaded from: http:///
AOZ2151TQI-19 rev 1.0 august 2017 www.aosmd.com page 12 of 17 for reliable operation and best performance, the input capacitors must have current rating higher than i cin-rms at worst operating conditions. ceramic capacitors are preferred for input capacitors because of their low esr and high ripple current rating. depending on the application circuits, other lo w esr tantalum capacitor or aluminum electrolytic capacitor may also be used. when selecting ceramic capacitors, x5r or x7r type dielectric ceramic capacitors are preferred for their better temperature and voltage charac teristics. note that the ripple current rating from capacitor manufactures is based on certain amount of life time. further de-rating may be necessary for practical design requirement. inductor the inductor is used to supply constant current to output when it is driven by a swit ching voltage. for given input and output voltage, inductance and switching frequency together decide the inductor ripple current, which is: the peak inductor current is: high inductance gives low inductor ripple current but requires larger size inductor to avoid saturation. low ripple current reduces indu ctor core losses. it also reduces rms current through inductor and switches, which results in less conduc tion loss. usually, peak to peak ripple current on inductor is designed to be 30% to 50% of output current. when selecting the inductor, make sure it is able to handle the peak current without saturation even at the highest operating temperature. the inductor takes the highest current in a buck circuit. the conduction loss on inductor needs to be checked for thermal and efficiency requirements. surface mount inductors in different shape and styles are available from coilcraft, elytone and murata. shielded inductors are small and radiate less emi noise. but they cost more than unshielded inductors. the choice depends on emi requirement, price and size. output capacitor the output capacitor is selected based on the dc output voltage rating, output ripple voltage specification and ripple current rating. the selected output capacitor must have a higher rated voltage specification than the maximum desired output voltage including ripple. de-rating needs to be considered for long term reliability. output ripple voltage specif ication is another important factor for selecting the output capacitor. in a buck converter circuit, output ripple voltage is determined by inductor value, switching frequency, output capacitor value and esr. it can be calculated by the equation below: where , c o is output capacitor value and esr co is the equivalent series resistor of output capacitor. when low esr ceramic capacitor is used as output capacitor, the impedance of the capacitor at the switching frequency dominates. output ripple is mainly caused by capacitor value and inductor ripple current. the output ripple voltage calculation can be simplified to: if the impedance of esr at switching frequency dominates, the output ripple voltage is mainly decided by capacitor esr and inductor ripple current. the output ripple voltage calculation can be further simplified to: for lower output ripple voltage across the entire operating temperature range, x5r or x7r dielectric type of ceramic, or other low esr tantalum are recommended to be used as output capacitors. in a buck converter, output capacitor current is continuous. the rms current of output capacitor is decided by the peak to peak inductor ripple current. it can be calculated by: usually, the ripple current rating of the output capacitor is a smaller issue because of the low current stress. when the buck inductor is selected to be very small and induc- tor ripple current is high, output capacitor could be over- stressed. ? i l v o fl ? ---------- - 1 v o v in -------- - C ?? ?? ?? ? = i lpeak i o ? i l 2 -------- + = ? v o ? i l esr co 1 8 fc o ? ? ------------------------- + ?? ?? ? = ? v o ? i l 1 8 fc o ? ? ------------------------- ? = ? v o ? i l esr co ? = i co_rms ? i l 12 ---------- = downloaded from: http:///
AOZ2151TQI-19 rev 1.0 august 2017 www.aosmd.com page 13 of 17 thermal management and layout consideration in the AOZ2151TQI-19 buck regulator circuit, high pulsing current flows through two circuit loops. the first loop starts from the input capacitors, to the vin pin, to the lx pins, to the filter inductor , to the output capacitor and load, and then return to the input capacitor through ground. current flows in the first loop when the high side switch is on. the second loop starts from inductor, to the output capacitors and load, to the low side switch. current flows in th e second loop when the low side low side switch is on. in pcb layout, minimizing the two loops area reduces the noise of this circuit and improves efficiency. a ground plane is strongly recommended to connect input capacitor, output capacito r, and pgnd pin of the AOZ2151TQI-19. in the AOZ2151TQI-19 buck regulator circuit, the major power dissipating components are the AOZ2151TQI-19 and the output inductor. the total power dissipation of converter circuit can be measured by input power minus output power. the power dissipation of inductor can be approximately calculated by output current and dcr of inductor and output current. the actual junction temper ature can be calculated with power dissipation in the AOZ2151TQI-19 and thermal impedance from junction to ambient. the maximum junction temperature of AOZ2151TQI-19 is 150oc, which limits the maximum load current capability. the thermal performance of the AOZ2151TQI-19 is strongly affected by the pcb layout. extra care should be taken by users during design process to ensure that the ic will operate under the re commended environmental conditions. p total_loss v in i in v o i o ? C ? = p inductor_loss i o 2 r inductor 1.1 ? ? = a ja loss inductor loss total junction t p p t ? ?? ? ? ) ( _ _ downloaded from: http:///
AOZ2151TQI-19 rev 1.0 august 2017 www.aosmd.com page 14 of 17 layout considerations several layout tips are list ed below for the best electric and thermal performance. 1. the lx pins and pad are connected to internal low side switch drain. they are low resistance thermal conduction path and most noisy switching node. connected a large copper plane to lx pin to help thermal dissipation. 2. the in pins and pad are connected to internal high side switch drain. they are also low resistance thermal conduction path. connected a large copper plane to in pins to help thermal dissipation. 3. input capacitors should be connected to the in pin and the pgnd pin as close as possible to reduce the switching spikes. 4. decoupling capacitor c vcc should be connected to v cc and agnd as close as possible. 5. voltage divider r1 and r2 should be placed as close as possible to fb and agnd. 6. keep sensitive signal traces such as feedback trace far away from the lx pins. 7. pour copper plane on all unused board area and connect it to stable dc nodes, like v in , gnd or v out . v in pgnd v out 12 3 4 5 67 8 9 10 11 12 13 14 1516 17 pgood fb agnd inin inin in lx pgnd pgnd pgnd lx lx en bst vcc in lx 18 ss v out c vcc c out c in downloaded from: http:///
AOZ2151TQI-19 rev 1.0 august 2017 www.aosmd.com page 15 of 17 package dimensions, qf n 3x3, 18 lead ep2_s note controlling dimensions is millimeter. converted inch dimensions are not necessarily exact. symbols min nom max min nom max a 0.45 0.55 0.9 0.018 0.022 0.026 0.10 0.15 0.25 0.00 0 .008 a2 2.90 3.00 3.10 0.114 0.118 0.122 1.82 1.92 2.02 0.072 0.076 0.080 1.74 1.84 1.94 0.069 0.072 0.076 0.17 0.21 0.31 0.007 0.008 0.012 0.17 0.21 0.31 0.007 0.008 0.012 0.75 0.85 0.95 0.030 0.033 0.037 0.35 0.40 0.45 0.014 0.016 0.018 1.10 1.20 1.30 0.043 0.047 0.051 0.49 0.54 0.59 0.019 0.021 0.023 0.51 0.56 0.61 0.020 0.022 0.024 2.90 3.00 3.10 0.114 0.118 0.122 0.15 0.20 0.25 0.006 0.008 0.010 0.45 0.50 0.55 0.01 0.02 0.022 0.25 0.30 0.35 0.010 0.012 0.014 0.90 1.00 1.10 0.035 0.039 0.043 0.35 0.40 0.45 0.014 0.016 0.018 0.80 0.90 1.00 0.031 0.035 0.039 1.26 1.36 1.46 0.05 0.05 0.057 0.64 0.69 0.74 0.025 0.027 0.029 0.35 0.40 0.45 0.014 0.016 0.018 0.55 0.60 0.65 0.022 0.024 0.026 0.35 0.40 0.45 0.014 0.016 0.018 0.27 0.32 0.37 0.011 0.013 0.015 dimensions in inches dimensions in millimeters 0.020ref 0.001ref recommended land pattern unit: mm top view side view bottom view ee1 e2 e3 e4 e5 e6 e7 e8 e9 d d1 d2 l l1 l2 l3 l4 l5 l6 l7 l8 b a1 downloaded from: http:///
rev 1.0 august 2017 www.aosmd.com page 16 of 17 AOZ2151TQI-19 tape and reel dimensions , qfn 3x3, 18 lead ep2_s carrier tape reel leader/trailer & orientation downloaded from: http:///
AOZ2151TQI-19 rev 1.0 august 2017 www.aosmd.com page 17 of 17 part marking abtl option code assembly lot code year & week code ywlt part number code aoz22151tqi-19 (qfn 3x3) as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. legal disclaimer alpha and omega semiconductor makes no representations or warranties with respect to the accuracy or completeness of the information provid ed herein and takes no liabilities for the consequences of use of such information or any product described herein. alpha and om ega semiconductor reserves the right to make changes to such information at any time without further notice. this document does not constitute the grant of any intellectual property rights or representation of non-infringement of any third partys intellectual property rights . life support policy alpha and omega semiconductor products are not authorized for use as critical components in life support devices or systems. downloaded from: http:///

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